dds_core Project Status (09/29/2011 - 15:28:05)
Project File: dds_top.xise Parser Errors: No Errors
Module Name: dds_core Implementation State: Programming File Not Generated
Target Device: xc6slx9-2tqg144
  • Errors:
  
Product Version:ISE 12.4
  • Warnings:
  
Design Goal: Balanced
  • Routing Results:
  
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
  
Environment:  
  • Final Timing Score:
   
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportCurrent周四 九月 29 15:28:04 2011
WebTalk Log FileCurrent周四 九月 29 15:28:05 2011

Date Generated: 09/29/2011 - 15:28:05